Quantum computers – myths and reality
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Quantum computers – myths and reality
The general public know more about quantum computers (QC) than silicon chips. Devs, the American science fiction thriller
https://lnkd.in/ddQSE6PK, provides good idea about quantum computers – both how they look and even what they may be capable of doing. QCs are all over the news – Google News features new QC story almost every new feed. The UK government and UK investors love QCs perhaps believing that in the future they may compensate for the UKs lack of advanced CMOS manufacturing capabilities. However, there are
and reality about quantum computers that should be clearly understood by the general public and by the politicians who make decisions about our science and technology future.
Myth No. 1: QCs will replace the classical (Von Neumann) computers.
Jack Krupansky addresses this myth in his article ‘What Can’t a Quantum Computer Compute?’ https://lnkd.in/dBE-cKME ‘Quantum computers offer some awesome features, but they lack most of the features of a general purpose Turing Machine which are offered by all classical computers.’ He lists 61 tasks that classical computers can and quantum computers cannot do. To start with: QC cannot compute PI to arbitrary large number of digits. Most importantly for me, QC cannot be used for solving partial differential equations – the backbone of modelling and simulation in all engineering disciplines including both CMOS and QC design.
So what are the ‘awesome’ QC features? According to Amit Katwala https://lnkd.in/dJm5X-65 ‘Quantum computers … let us do things that we couldn’t even have dreamed of without them’. This covers new algorithms for artificial intelligence (AI) applications, predicting uncertain complicated systems like the financial markets, drug discovery, and perhaps like in Devs, revealing the past future relations. From military and national security point of view the QC have the potential of cracking all encryption algorithms designed so far.
Myth No. 2. Silicon quantum chips can replace the ‘real’ (CMOS) chips.
Even if the development QC on a silicon chip is succesful, the replacement will be impossible, since QC cannot do most of the things that the silicon chip are currently doing in your mobile phones, laptops, workstations and data centres. And of course silicon QC can only work at very low temperature (close to milli-kelvin regime) – can you imagine carrying your mobile phone in a helium cryostat? By the way, perhaps more than 90% of the electronic contents of the present QCs are silicon chips.
Therefore, establishing and hopefully sustaining UK leadership in quantum computers is not a remedy for the UK lack of CMOS chip manufacturing capabilities. Clearly, we need to go back to the drawing board and figure out What Needs to be Done with CMOS in the UK.
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Sausages or Chips?
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Sausages or Chips?
To be honest I like them both. However, this is not a culinary post. This is about the importance of the collaboration between UK and EU in the area of CMOS technology and design through participation in EU projects. The UK’s exclusion from the Horizon programme will hamper our capabilities to rebuild CMOS technology and design expertise and the corresponding research, training and entrepreneurship.
The government’s pledge that a potential exclusion from Horizon can be compensated by increasing the amount of UK research funding will not work in the CMOS area. UK will have no access to the technology capabilities of IMEC, LETI, MINATEC, Fraunhofer and Tindal and to project partners like GLOBALFOUNDRIES, Infineon, ST Microelectronics, NXP, X-Fab, Bosh and others.
I would like to illustrate the role of the EU collaboration for the establishment, the growth and the success of my former TCAD company Gold Standard Simulation (GSS) by listing the role of the key EU projects in which we were involved:
ENIAC MODERN (2009) “MOdeling and DEsign of Reliable, process variation-aware
Nanoelectronic devices, circuits and systems” (ST Microelectronics (STM), Austria Microsystems, NXP Semiconductors, CEA-LETI, Synopsys and others). Although the UK decided not to fund this ENIAC project, I secured funding form Scottish Enterprise (SE) and EPSRC for the Glasgow University participation. GSS became a subcontractor creating the commercial version of the ‘atomistic’ TCAD simulator GARAND developed in my Device Modelling Group and licenced to GSS. GARAND was validated against state-of-the-art 40nm and 28nm CMOS measurements at STM.
TRAMS (2009) Terascale Reliable Adaptive Memory Systems (IMEC, Intel) played key role in the development of the GSS statistical compact model extractor Mystic and the statistical circuit simulation engine RandomSpice capable of predicting the impact of atomic scale variability on the yield of large SRAM arrays.
SUPERTHEME (2012) Circuit Stability Under Process Variability and Electro-Thermal-Mechanical Coupling (Frounhofer IISB, Austria Microsystems, ASML) played a key role in the development of the first TCAD based DTCO flow by GSS, including process induced and purely statistical variability.
Three Horizon projects SUPERAID7, CONNECT and REMINDER solidified the exit potential of GSS in 2016, enabling the development of the most advanced and comprehensive DTCO tool chain offered presently by Synopsys and used by the major advanced semiconductor manufacturers worldwide. As a result a 30 strong Synopsys R&D TCAD and DTCO centre was established in Glasgow.
Thus, the EU projects and collaborations provided GSS with crucial access to the knowledge and expertise of Intel, ST Microelectronics, NXP, Austria Microsystems, ASML, Synopsys, IMEC, CEA-LETI and others, enabling our success. GARAND, MYSTIC and RANDOM SPICE are now part of the Synopsys DTCO flow used by the major CMOS players worldwide. #semiconducto
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The Quantum computer in Devs.
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How many angels can dance on the top of a pin?
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How many angels can dance on the top of a pin?
How many angels can dance on the top of a pin?
(Or who is supporting the inverted electronics value chain pyramid?)
In the recent year even the general public started to realise that our inverted economy pyramid is balancing dangerously on the semiconductor industry. In this post I would like to focus on few facts.
In the figure below the data for the worldwide electronics value chain are from 2017, however the data for the wafer capacity are from 2020.
The worldwide GDP in 2017 was $81.2 trillion. $48.8 (60%) of this value was directly enabled by the semiconductor industry. Much of the rest of the GDP was most probably also heavily supported by the semiconductor industry.
The semiconductor manufacturers are supporting this top heavy inverted pyramid.
Clearly the support of the inverted pyramid from the East outweighs by far the support from the West. And in the middle between the West and the East is Russia…
For long year the UK focus has been at the top of the pyramid. Can you guess whose support of the inverted pyramid the hair thin line on the West represents? Actually the line should be so thin that it becomes invisible.
In strong wind situations the inverted pyramids have tendency of falling and crashing in the direction of less support.
#semiconductor #CMOS #microelectronics #electronics #economy
If this subject is important to you please join the Silicon Futures network on LinkedIn.
The Quantum computer in Devs.
